Talk : Low-Power Circuit Optimization with Multi-Bit Registers

报告时间：2019年3月15号，2:30pm

报告地点：数计学院4号楼229室

Abstract:

I will describe our recent progresses on routability analysis. We encounter complex conditional design rules with shrinking track numbers and increasing pin density. We propose a routing rule management system to identify the tradeoff between the routability and the parameters of design rules. We propose a framework that perform the routability analysis and identify the conflicting rules if the layout deems not routable. The system will allow the designer to optimize pin placement patterns and fine tune the design rules.

Bio:

Chung-Kuan Cheng is with UC San Diego as a Distinguished Professor at CSE Department, and an Adjunct Professor at ECE Department. He has advised 41 Ph.D. graduates and hosted 37 visiting scholars. He is a recipient of the best paper awards, IEEE Trans. on Computer-Aided Design in 1997, and in 2002, the NCR excellence in teaching award, School of Engineering, UCSD in 1991, IEEE Fellow in 2000, IBM Faculty Awards in 2004, 2006, and 2007, the Distinguished Faculty Certificate of Achievement, UJIMA Network, UCSD in 2013, and Cadence Academic Collaboration Award 2016. His research interests include design automation on microelectronic circuits, network optimization, and medical modeling and analysis.